Tape recording

The first implementation of PRML was shipped in 1984 in the Ampex Digital Cassette Recording System (DCRS). The chief engineer on DCRS was Charles Coleman. The machine evolved from a 6-head, transverse-scan, digital video tape recorder. DCRS was a cassette-based, digital, instrumentation recorder capable of extended play times at very high data-rate.^[9] It became Ampex' most successful digital product.^[10]

The heads and the read/write channel ran at the (then) remarkably high data-rate of 117 Mbits/s.^[11] The PRML electronics were implemented with four 4-bit, Plessey analog-to-digital converters (A/D) and 100k ECL logic.^[12] The PRML channel outperformed a competing implementation based on "Null-Zone Detection".^[13] A prototype PRML channel was implemented earlier at 20 Mbit/s on a prototype 8-inch HDD,^[14] but Ampex exited the HDD business in 1985. These implementations and their mode of operation are best described in a paper by Wood and Petersen.^[15] Petersen was granted a patent on the PRML channel but it was never leveraged by Ampex.^[16]

Hard disk drives

In 1990, IBM shipped the first PRML channel in an HDD in the IBM 0681 It was full-height 5¼-inch form-factor with up to 12 of 130 mm disks and had a maximum capacity of 857 MB.

The PRML channel for the IBM 0681 was developed in IBM Rochester lab. in Minnesota^[17] with support from the IBM Zurich Research lab. in Switzerland.^[18] A parallel R&D effort at IBM San Jose did not lead directly to a product.^[19] A competing technology at the time was 17ML^[20] an example of Finite-Depth Tree-Search (FDTS).^[21][22]

The IBM 0681 read/write channel ran at a data-rate of 24 Mbits/s but was more highly integrated with the entire channel contained in a single 68-pin PLCC integrated circuit operating off a 5 volt supply. As well as the fixed analog equalizer, the channel boasted a simple adaptive digital cosine equalizer^[23] after the A/D to compensate for changes in radius and/or changes in the magnetic components.

Write precompensation

The presence of nonlinear transition-shift (NLTS) distortion on NRZ recording at high density and/or high data-rate was recognized in 1979.^[24] The magnitude and sources of NLTS can be identified using the 'extracted dipulse' technique.^[25][26]

Ampex was the first to recognize the impact of NLTS on PR4.^[27] and was first to implement Write precompensation for PRML NRZ recording. 'Precomp.' largely cancels the effect of NLTS.^[14] Precompensation is viewed as a necessity for a PRML system and is important enough to appear in the BIOS HDD setup^[28] although it is now handled automatically by the HDD.

Generalized PRML

PR4 is characterized by an equalization target (+1, 0, -1) in bit-response sample values or (1-D)(1+D) in polynomial notation (here, D is the delay operator referring to a one sample delay). The target (+1, +1, -1, -1) or (1-D)(1+D)^2 is called Extended PRML (or EPRML). The entire family, (1-D)(1+D)^n, was investigated by Thapar and Patel.^[29] The targets with larger n value tend to be more suited to channels with poor high-frequency response. This series of targets all have integer sample values and form an open eye-pattern (e.g. PR4 forms a ternary eye). In general, however, the target can just as readily have non-integer values. The classical approach to maximum-likelihood detection on a channel with intersymbol interference (ISI) is to equalize to a minimum-phase, whitened, matched-filter target.^[30] The complexity of the subsequent Viterbi detector increases exponentially with the target length - the number of states doubling for each 1-sample increase in target length.

Post-processor architecture

Given the rapid increase in complexity with longer targets, a post-processor architecture was proposed, firstly for EPRML.^[31] With this approach a relatively simple detector (e.g. PRML) is followed by a post-processor which examines the residual waveform error and looks for the occurrence of likely bit pattern errors. This approach was found to be valuable when it was extended to systems employing a simple parity check^[32][33][34]

PRML with nonlinearities and signal-dependent noise

As data detectors became more sophisticated, it was found important to deal with any residual signal nonlinearities as well as pattern-dependent noise (noise tends to be largest when there is a magnetic transition between bits) including changes in noise-spectrum with data-pattern. To this end, the Viterbi detector was modified such that it recognized the expected signal-level and expected noise variance associated with each bit-pattern. As a final step, the detectors were modified to include a 'noise predictor filter' thus allowing each pattern to have a different noise-spectrum. Such detectors are referred to as Pattern-Dependent Noise-Prediction (PDNP) detectors^[35] or noise-predictive maximum-likelihood detectors (NPML).^[36] Such techniques have been more recently applied to digital tape recorders.^[37]