| Information | |
|---|---|
| Funding Agency | European Commission |
| Framework Programme | FP7 |
| Project Type | Specific Targeted Research Project (STReP) |
| Participants | Politecnico di Milano, DS2, STMicroelectronics (Italy & China), IMEC, ESTECO, ALaRI, University of Cantabria, ICT |
| Start | January, 2008 |
| End | June, 2010 |
| Website | http://www.multicube.eu |
MULTICUBE ("Multi-objective Design Space Exploration of MultiProcessor-SoC Architectures for Embedded Multimedia Applications") is a Seventh Framework Programme (FP7) project aimed to define innovative methods for the design optimization of computer architectures for the embedded system domain.
Background
Embedded systems are specialized computing systems for wide domain of applications ranging from mobile phones and wearable electronics for military applications to control systems for automobile, factories and home automation. Even if all these domains are different, they are all characterized by their computational and programmability needs. All these applications need an underlying computing platform specially designed to cater to the application needs.
The improvements in Very Large Scale Integrations technology (VLSI) and the availability of the high computational power provided by System-on-a-Chip (SoC) has enabled development of highly sophisticated embedded applications.[1][2] Today, the computer architectures are often designed in a multi-core paradigm, where more processors are integrated onto the same chip/die. This type of computer architecture can also be referred to as Chip-MultiProcessors (CMP), MultiProcessor-SoC (MPSoC) or, Network On Chip (NoC) where different processors communicate via a network infrastructure.
Challenges in MPSoC Design Optimization
Designing complex systems on chip many platform parameters has to be tuned. This is done in order to maximize platform performances while minimizing non functional costs such as the power consumption. This tuning phase is called Design Space Exploration (DSE). This process can be formalized as a multiobjective optimization problem where non-commensurable objectives have to be maximized (or minimized).
In the context of MPSoC design, the problem is twofold:
- Given the large amount of platform parameters and the large number of values that these parameters can assume, the design space of advanced computer architectures is huge. Theoretically, identifying the Pareto-optimal solutions in such space requires the evaluation of each platform configuration value sets. This is impracticable.
- The evaluation of a single candidate architecture configuration generally requires the performance analysis over a detailed system model. Generally this analysis is performed via computationally expensive simulations. Depending on platform and application complexity a single computer simulation can take hours or even days.
Approach
With the aim to reduce the design time of future embedded systems, the MULTICUBE project faces the problems related to multiobjective DSE of MPSoC platforms.[3] The MULTICUBE project defines an automatic framework for DSE providing advanced methodologies for heuristic optimization and techniques for analyzing the effects of platform parameters in order to restrict the search space to the crucial ones enabling an efficient optimization.
To have a trade-off between exploration speed and solution accuracy, the MULTICUBE project proposes a multilevel modeling methodology.[4][5] The underlying idea is that the expensive simulations with a detailed low-level system model are not always needed. Rather, for obtaining sufficient number of design points, approximate but faster evaluation methods are acceptable.[6] Thus, the multilevel system modeling enables quick analysis of many design points using high level models. The final configuration is obtained by performing a more accurate low level simulations on the most promising candidates obtained from the high level approximation methods.
Among other activities, the MULTICUBE project develops open source tools for MPSoC modeling and optimization providing to the research and engineering communities the above-mentioned methodologies.
References
- ↑ Nan Yuan, Yongbin Zhou, Guangming Tan, Junchao Zhang, Dongrui Fan. "High Performance Matrix Multiplication on Many Cores." In proceedings of the 15th international Euro-Par conference on Parallel Processing. 2009-12.
- ↑ Giovanni Mariani, Vittorio Zaccaria, Gianluca Palermo, Prabhat Avasare, Geert Vanmeerbeeck, Chantal Ykman-Couvreur, Cristina Silvano. "An industrial design space exploration framework for supporting run- time resource management on multi-core systems". In DATE 2010 - International Conference on Design, Automation and Test in Europe. Dresden, Germany. March 2010.
- ↑ C. Kavka, L. Onesti, P. Avasare, G. Vanmeerbeeck, M. Wouters and H. Posadas. "Design Space Exploration for Embedded Parallel System-on-Chip Platforms using modeFRONTIER" at the Second Mini Conference on Theoretical Computer Science, 12th International Information Society Multiconference, Koper, Slovenia, October 2009.
- ↑ Giovanni Mariani, Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria. "Multiprocessor System-on-Chip Design Space Exploration based on Multi-level Modeling Techniques" In Proceedings of IEEE IC- SAMOS'09 - International Conference on Embedded Computer Systems: Architectures, MOdeling, and Simulation, Samos, Greece, July 2009, pp. 118-124.
- ↑ Gianluca Palermo, Cristina Silvano and Vittorio Zaccaria. "ReSPIR: A Response Surface-based Pareto Iterative Refinement for Application-Specific Design Space Exploration " In IEEE Transactions on Computer- Aided Design of Integrated Circuits and Systems. Volume 28 Issue 12, December 2009 pp. 1816-1829
- ↑ H. Posadas, E. Villar, G. de Miguel. "Automatic generation of modifiable platform models in SystemC for Automatic System Architecture Exploration " In DCIS2009 - XXIV Conference on Design of Circuits and Integrated Systems, Zaragoza, Spain. 2009-11