Rockwell PPS-4 in a QIP-42 package

In microelectronics, a quad in-line package (QIP or QIL), is an electronic component package with a rectangular housing and four parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board (PCB) or inserted in a socket. Rockwell used a QIP with 42 leads formed into staggered rows for their PPS-4 microprocessor family introduced in 1973,[1] and other microprocessors and microcontrollers, some with higher lead counts, through the early 1990s.

The QIP has the same dimensions as a Dual in-line package (DIP), but the leads on each side are bent into an alternating zigzag configuration so as to fit four lines of solder pads (instead of two with a DIP but similar to Zig-zag in-line package). The QIP design increased the spacing between solder pads without increasing package size, for two reasons:

  1. First it allowed more reliable soldering. This may seem odd today, given the far closer solder pad spacing in use now, but in the 1970s, the heyday of the QIL, bridging of neighbouring solder pads on DIP ICs was an issue at times,
  2. QIP also increased the possibility of running a copper track between two solder pads. This was very handy on the then standard single sided single layer PCBs.

Some QIP packaged ICs had added heatsinking tabs, such as the HA1306W.[2]

A Zilog Z8-02 packaged in QIP-64
3M QUIP socket
bottom view
top view

Intel and 3M developed the ceramic leadless quad in-line package (QUIP), introduced in 1979, to boost microprocessor density and economy.[3] The ceramic leadless QUIP is not designed for surface-mount use, and requires a socket. It was used by Intel for the iAPX 432 microprocessor chip set, and by Zilog for the Z8-02 external-ROM prototyping version of the Z8 microcontroller.

References

  1. ↑ Data Sheet: Parallel Processing System (PPC-4) Microcomputer (PDF), 1973, archived from the original (PDF) on November 14, 2011, retrieved April 28, 2014
  2. ↑ HA1306W datasheet
  3. ↑ Intel & 3M Develop Package to Boost Microprocessor Density & Economy, Intelligent Machines Journal, March 14, 1979


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